1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor structure, and more particularly, to a manufacturing method of a semiconductor structure with an oxygen annealing treatment on a barrier layer.
2. Description of the Prior Art
In the continuously improved semiconductor integrated circuit technology, the sizes of the semiconductor devices become smaller for increasing the integrity of the integrated circuit. In the scaling down process, the thickness control of layers in the semiconductor device becomes more and more critical. For improving the metal-oxide-semiconductor field effect transistor (MOSFET) device performance as feature sizes continue to decrease, the traditional gate oxide and polysilicon gate electrode are replaced by a high dielectric constant (high-k) gate dielectric and a metal gate electrode. In high-k gate stacks, the interfacial layer (IL) underlying the high-k dielectric layer plays a critical role in the performance of the. However, the thickness and the quality of the IL may be influenced by subsequent thermal processes, and the performance of the MOSFET device will be affected accordingly.
For keeping the qualities of the high-k dielectric layer and the IL from being influenced by the subsequent thermal processes, a capping layer may be formed to cover the IL, the high-k dielectric layer, and a barrier layer on the high-k dielectric layer. The capping layer has to be removed before the step of forming the metal gate, and the residual capping layer will seriously influence the performance and the function of the MOSFET device.